Structure of high-frequency components with low stray capacitances

ABSTRACT

A structure including at least two neighboring components, capable of operating at high frequencies, formed in a thin silicon substrate extending on a silicon support and separated therefrom by an insulating layer, the components being laterally separated by insulating regions. The silicon support has, at least in the vicinity of its portion in contact with the insulating layer, a resistivity greater than or equal to 1,000 ohms.cm.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a structure comprising high-frequencycomponents, for example a protection structure.

2. Discussion of the Related Art

Generally, electronic components are formed either in a solid substratesemiconductor wafer, or in a semiconductor-on-insulator (SOI) layer.

FIG. 1 shows the upper portion of a doped solid substrate 1 of a firstconductivity type, for example, P, in which are formed several dopedwells 3 of a second conductivity type, for example N. High-frequencyelectronic components can then be formed in wells 3. The isolationbetween wells 3 results from an appropriate biasing of the PN junctionsbetween wells 3 and substrate 1. The capacitances between a well 3 andsubstrate 1 and between two neighboring wells 3 are often non-negligibleas compared with the specific capacitances of the components formed inwells 3 and this is a problem, especially in the field of high-frequencycomponents.

FIG. 2 shows an example of an SOI type structure. This structurecomprises, on a semiconductor support 5, a thin layer of a semiconductorsubstrate with an interposed silicon oxide layer 7. Semiconductor wells9, in which are formed electronic components, are formed side by side inthe substrate. The free space between the wells is occupied by aninsulator, for example, silicon oxide 11. The silicon oxide of layer 7,as for itself, enables insulating the electronic components in thevertical direction. This structure has the advantage over the structureof FIG. 1 of decreasing the values of the stray capacitances betweenneighboring components. However, these capacitances are not negligiblein certain cases, especially at high frequency.

SUMMARY OF THE INVENTION

The present invention aims at providing a structure comprising severalelectronic components operating at high frequency, insulated withrespect to one another, in which the stray capacitances betweencomponents are decreased.

To achieve all or part of these objects as well as others, oneembodiment of the present invention provides a structure comprising atleast two neighboring components, capable of operating at highfrequencies, formed in a thin silicon substrate extending on a siliconsupport of a first conductivity type and separated therefrom by aninsulating layer, the components being laterally separated by insulatingregions, wherein the silicon support has, at least in the vicinity ofits portion in contact with the insulating layer, heavily-doped islandsof a second conductivity type, the distance between islands beingsmaller than twice the extent of the space charge area created by thejunction with the silicon support.

According to an embodiment of the present invention, the components aretwo diodes for protecting a line, the first diode having its anodeconnected to ground and its cathode connected to the line to beprotected and the second diode having its cathode connected to a supplyvoltage and its anode connected to the line to be protected.

According to an embodiment of the present invention, each diodecomprises a silicon well of a first conductivity type having its bottomand its lateral walls bordered by an area of the first conductivity typewith a strong doping level and in the surface of which is formed aregion of the second conductivity type.

The foregoing and other objects, features, and advantages of the presentinvention will be discussed in detail in the following non-limitingdescription of specific embodiments in connection with the accompanyingdrawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1 and 2, previously described, are cross-section viewsillustrating two known electronic component forming modes;

FIG. 3 is a cross-section view of a structure comprising two diodesaccording to an embodiment of the present invention;

FIG. 4 is an equivalent electric diagram of the structure of FIG. 3;

FIG. 5 illustrates the stray capacitances present in the structure ofFIG. 3;

FIG. 6 is an equivalent electric diagram of the structure of FIG. 5; and

FIG. 7 illustrates a structure according to an alternative embodiment ofthe present invention.

DETAILED DESCRIPTION

For clarity, the same elements have been designated with the samereference numerals in the different drawings and, further, as usual inthe representation of semiconductor components, the variousrepresentations of semiconductor components are not drawn to scale.

FIG. 3 shows two adjacent diodes D1 and D2 of protection againstovervoltages. These diodes are placed side by side and are formed on anSOI-type structure comprising a thin semiconductor substrate formed onan insulating layer 7, itself formed on a semiconductor support 5.Diodes D1 and D2, which are identical, are laterally insulated byinsulating regions 11, for example made of silicon oxide. Each diodecomprises an N-type doped well 13 in which is formed a P-type dopedregion 15. The well is surrounded (bottom, lateral walls and part of itsupper surface) with a heavily-doped N-type region 17. Anode and cathodecontacts 21 and 22 are formed on region 15 and on region 17 in contactwith well 13. Anode 21 of diode D1 is grounded. Cathode 22 of diode D2is connected to a voltage source Vcc. Cathode 22 of diode D1 and anode21 of diode D2 are connected to a line I/O to be protected.

FIG. 4 shows the equivalent electric diagram of the structure shown inFIG. 3. This circuit comprises diode D1 having its anode connected toground and its cathode connected to a line I/O to be protected, anddiode D2 having its cathode connected to voltage source Vcc and itsanode connected to line I/O.

As described previously, components D1 and D2 are insulated from eachother by insulating layer 7 and by insulating regions 11. Now, thisinsulation is not perfect and stray capacitances still exist between thevarious components, which capacitances must be minimized for ahigh-frequency operation.

FIG. 5 shows a modeling of the different capacitances of the structureof FIG. 3. The stray capacitance horizontally created between the twowells 13 is called C1. The stray capacitances vertically formed betweenwells 13 and support 5 are called C2 and C2′. The impedance of support 5between the areas underlying components D1 and D2 is formed of aresistor Rs in parallel with a capacitor Cs.

FIG. 6 illustrates the way in which the various high-frequencycapacitances are associated, in which case it can be considered thatterminals Vcc and the ground are connected. This drawing relates to thecase where the diodes are off. The diode capacitances are designated asC_(D1) and C_(D2), respectively. Capacitances C_(D1), C1, and C_(D2) arein parallel, the assembly being in parallel with the series assembly ofcapacitances C2 and C2′ and of impedance (Cs/Rs) of support 5.

The applicant has analyzed the circuit operation at 1 MHz. This analysisis summed up by table 1 hereafter. This table indicates the values ofthe various capacitances for various resistivity values of the materialof support 5. The capacitance values are given in arbitrary units,stating that, for a relatively conductive substrate of a resistivitylower than 1 ohm.cm, the assembly of the capacitances of both diodes D1and D2 and of the associated parasitic elements brings the capacitanceon terminal I/O (see FIG. 6) to a value of 1.

TABLE 1 1 ohm · 5,000 cm 10 ohms · cm 1,000 ohms · cm ohms · cm D1//D20.64 0.64 0.64 0.64 C1 0.08 0.08 0.08 0.08 D1//D2//C1 0.72 0.72 0.720.72 C2 + C2′ 0.28 0.28 0.28 0.28 Cs High High 0.8 0.37 C2 + C2′ + Cs0.28 0.28 0.21 0.16 Total Cap. 1 1 0.93 0.88

It is considered that diodes D1 and D2 each have a 0.32 capacitance andthat capacitance C1 of the oxide walls is 0.08, which brings theparallel value of the capacitances of diodes D1, D2, and C1 to 0.72.Capacitances C2 and C2′ corresponding to oxide 7 of the SOI structurehave in series a value equal to 0.28. All the above-mentionedcapacitances have constant values, independently from the resistance ofsupport 5. However, the equivalent capacitance Cs of the impedance ofsupport 5 depends on the resistivity of this support. Thus, it can beseen that for a frequency of approximately 1 MHz, the contribution ofthe impedance of support 5 decreases from 0.28 to 0.16 when theresistivity of support 5 increases from 1 to 5,000 ohms.cm. Thisdifference is not very significant and this may be the reason why priorart studies for improving the influence of stray capacitances have cometo nothing.

The applicant has carried out the same study in the context of the samecircuit operating at a 1 GHz frequency. The results of this study areprovided in table 2 hereafter.

TABLE 2 1 ohm · 5,000 cm 10 ohms · cm 1,000 ohms · cm ohms · cm D1//D20.64 0.64 0.64 0.64 C1 0.08 0.08 0.08 0.08 D1//D2//C1 0.72 0.72 0.720.72 C2 + C2′ 0.28 0.28 0.28 0.28 Cs High 1.6 0.01 0.01 C2 + C2′ + Cs0.28 0.24 0.01 0.01 Total Cap. 1 0.96 0.73 0.73

It can be seen that for most of its lines, table 2 corresponds totable 1. Especially, the capacitances of diodes D1 and D2, capacitanceC1 and capacitances C2 and C2′ practically do not vary along with thefrequency. However, equivalent capacitance Cs of the substrate depends alot on the frequency. While it was relatively high at a 1-MHz frequency,when operating at frequencies close to 1 GHz, its value considerablydecreases when the substrate resistivity increases. Thus, as shown bythe table, as soon as the substrate resistivity exceeds 1000 ohms.cm,the contribution of capacitances C2, Cs, and C2′ altogether becomesnegligible: the total capacitance varies from 0.72 in the case where thesubstrate would have been perfectly insulating to 0.73 as soon as thesubstrate reaches a resistivity greater than 1,000 ohms.cm, that is, theinfluence of the substrate becomes negligible. It should however benoted that this could not be observed at frequencies on the order of onemegahertz.

Thus, the present invention provides using a substrate of a resistivityequal to or greater than 1000 ohms.cm to reduce the inter-componentcapacitance of a high-frequency circuit intended to operate a values onthe order of one gigahertz or more.

A way to obtain this performance increase without requiring anadditional increase in the substrate resistivity is illustrated in FIG.7. Heavily-doped islands 23 of the conductivity type opposite to that ofthe substrate, for example, N⁺ islands in a P substrate, are formed inthe upper substrate portion. This results in the creation of a depletedarea 25 free of any carrier, which can be considered as equivalent to aninsulator. In the case of a substrate of a doping level on the order of5.10¹² atoms/cm³, the extent of the depleted area is on the order offrom 10 to 15 μm. A structure having a heavily-insulating upper portionis thus obtained, which enables improving the performances displayed intable 1, achieving the advantages previously discussed in relation withtable 2.

With the above-indicated method, it should be noted that the frequencyfor which a decrease in the stray capacitance is obtained is decreased.Thus, low stray capacitance values may be provided, such as indicated inthe right-hand column of table 2, at frequencies much lower than 1 GHz.The present invention can then usefully be applied to devices operating,for example, at frequencies on the order of one megahertz.

The present invention has been described in the context of theassociation of two protection diodes for high-frequency circuits. Itshould be understood that the present invention may find otherapplications and generally applies in the high-frequency field when thestray capacitances between two components are desired to be asnegligible as possible.

Of course, the present invention is likely to have various alterations,modifications, and improvements which will readily occur to thoseskilled in the art. Such alterations, modifications, and improvementsare intended to be part of this disclosure, and are intended to bewithin the spirit and the scope of the present invention. Accordingly,the foregoing description is by way of example only and is not intendedto be limiting. The present invention is limited only as defined in thefollowing claims and the equivalents thereto.

1. A structure comprising at least two neighboring components formed ina thin silicon substrate extending on a silicon support of a firstconductivity type and separated from the silicon support by aninsulating layer, the components being laterally separated by insulatingregions, wherein the silicon support has, at least in the vicinity of aportion in contact with the insulating layer, heavily-doped islands of asecond conductivity type, the distance between islands being smallerthan twice an extent of a space charge area determined by doping levelsof the islands and of the silicon support.
 2. The structure of claim 1,wherein the at least two neighboring components comprise a first diodeand a second diode for protecting a line, the first diode having itsanode connected to ground and its cathode connected to the line to beprotected and the second diode having a cathode connected to a supplyvoltage and its anode connected to the line to be protected.
 3. Thestructure of claim 2, wherein each diode comprises a silicon well of afirst conductivity type, the silicon well having a bottom and lateralwalls bordered by an area of the first conductivity type with a strongdoping level and in the surface of which is formed a region of thesecond conductivity type.
 4. The structure of claim 1, wherein thestructure is arranged such that, when the structure receives as input asignal at a frequency exceeding one gigahertz, at least one capacitancebetween the at least two neighboring components does not disrupt thesignal.
 5. The structure of claim 1, wherein the distance between theheavily-doped islands is such that, when the structure is operated andrespective depletion region is formed by each of the heavily-dopedislands, the respective depletion regions overlap to form a singledepletion region.
 6. An apparatus comprising: a semiconductor substrateof a first conductivity type; an insulating layer formed on thesemiconductor substrate; heavily-doped islands of a second conductivitytype spaced along an interface between the semiconductor substrate andthe insulating layer and separated by a distance less than twice anextent of a space charge region extending from each island, the spacecharge region determined by doping levels of the islands and of thesemiconductor substrate; and a semiconductor device formed on theinsulating layer, wherein the semiconductor substrate is configured tohave a resistivity of greater than or equal to one kilohm-cm during anoperation of the apparatus.
 7. The apparatus of claim 6, wherein theextent of the space charge region extending from each heavily-dopedisland is between about 10 microns and about 15 microns.
 8. Theapparatus of claim 6, wherein the semiconductor device comprises a p-ndiode.
 9. The apparatus of claim 6, wherein the semiconductor substratecomprises p-type material.
 10. The apparatus of claim 6, wherein theapparatus is capable of being operated at frequencies exceeding onegigahertz with negligible contribution of capacitance from thesemiconductor substrate.
 11. The apparatus of claim 6, wherein theheavily-doped islands form in the semiconductor substrate a continuousdepletion region stretching across the semiconductor substrate and underthe semiconductor device.
 12. The apparatus of claim 11, wherein thesecond conductivity type comprises a different carrier type from thefirst conductivity type.
 13. The apparatus of claim 11, wherein thesemiconductor device comprises a first diode connected to a seconddiode.
 14. The apparatus of claim 13, wherein a first terminal of thefirst diode is connected to a first potential, a second terminal of thefirst diode is connected to a first terminal of the second diode, and asecond terminal of the second diode is connected to a second potential.15. The apparatus of claim 13, wherein each diode comprises a siliconwell of a first conductivity type, the silicon well having a bottom andlateral walls bordered by an area of the first conductivity type with aheavy doping level.
 16. The apparatus of claim 6, wherein a dimension ofeach heavily doped island in the plane of the substrate is smaller thana dimension of the semiconductor device in the plane of the substrate.17. A semiconductor structure comprising: a thin semiconductor layer; aninsulating layer; a semiconductor substrate of a first conductivitytype; and heavily-doped islands of a second conductivity type spacedalong an interface between the semiconductor substrate and theinsulating layer and separated by a distance less than twice an extentof a space charge region extending from each island, the space chargeregion determined by doping levels of the islands and of thesemiconductor substrate.
 18. The semiconductor structure of claim 17,further comprising at least one semiconductor device formed in the thinsemiconductor layer.
 19. The semiconductor structure of claim 18,wherein the at least one semiconductor device comprises a diode.
 20. Thesemiconductor structure of claim 17, wherein the semiconductor substratehas a resistivity greater than or equal to one kilohm-cm in the vicinityof the insulating layer.